Built GDT + IDT + exception handlers

docs/arch.md

@@ -62,8 +62,13 @@ There are really two independent questions, and it's worth not conflating them:
 ## Current x86_64 contents
 
 - **`src/arch/x86_64/cpu.zig`** — the `arch` module root. Exposes `halt()` (see
-  [halting.md](halting.md)); GDT, IDT and paging will join it here as the kernel
-  grows.
+  [halting.md](halting.md)), `init()` (bring up the descriptor tables),
+  `setFaultHandler`, `readCr2`, and the `CpuState` trap frame. Paging will join it
+  here as the kernel grows.
+- **`src/arch/x86_64/gdt.zig`** / **`idt.zig`** — the GDT and IDT plus CPU-exception
+  handling (see [interrupts.md](interrupts.md)).
+- **`src/arch/x86_64/isr.s`** — the exception stubs and the `lgdt`/`lidt` load
+  helpers, in real assembly because Zig inline asm can't express them.
 - **`src/arch/x86_64/linker.ld`** — the kernel link layout (fixed low load
   address, one PT_LOAD per permission set).