Built GDT + IDT + exception handlers

src/arch/x86_64/idt.zig

@@ -0,0 +1,122 @@
+//! Interrupt Descriptor Table and the CPU-exception handlers. Without this, any
+//! fault (a stray pointer, a bad page-table entry) triple-faults and silently
+//! resets the machine. With it, the CPU vectors into our stubs, which capture the
+//! register state and hand it to a reporter that prints what went wrong.
+//!
+//! Only the 32 architecture-defined exception vectors are wired up here; device
+//! interrupts (the APIC, timer, keyboard) come later.
+
+const gdt = @import("gdt.zig");
+
+/// The register + trap frame the ISR stubs build on the stack, laid out so the
+/// lowest address (where RSP points when we call the handler) is the first field.
+/// See the push order in `isrCommon` below.
+pub const CpuState = extern struct {
+    r15: u64,
+    r14: u64,
+    r13: u64,
+    r12: u64,
+    r11: u64,
+    r10: u64,
+    r9: u64,
+    r8: u64,
+    rbp: u64,
+    rdi: u64,
+    rsi: u64,
+    rdx: u64,
+    rcx: u64,
+    rbx: u64,
+    rax: u64,
+    vector: u64, // pushed by the per-vector stub
+    error_code: u64, // real one from the CPU, or 0 pushed by the stub
+    rip: u64, // from here down: pushed by the CPU on entry
+    cs: u64,
+    rflags: u64,
+    rsp: u64,
+    ss: u64,
+};
+
+/// Where a fault is reported. The kernel overrides this (see setFaultHandler) with
+/// something that prints to the console; until then, just stop.
+pub var on_fault: *const fn (*const CpuState) noreturn = defaultFault;
+
+fn defaultFault(_: *const CpuState) noreturn {
+    while (true) asm volatile ("hlt");
+}
+
+/// Names for the 32 defined exception vectors, for readable output.
+const names = [_][]const u8{
+    "divide error",             "debug",
+    "NMI",                      "breakpoint",
+    "overflow",                 "bound range exceeded",
+    "invalid opcode",           "device not available",
+    "double fault",             "coprocessor segment overrun",
+    "invalid TSS",              "segment not present",
+    "stack-segment fault",      "general protection fault",
+    "page fault",               "reserved (15)",
+    "x87 floating-point",       "alignment check",
+    "machine check",            "SIMD floating-point",
+    "virtualization",           "control protection",
+    "reserved (22)",            "reserved (23)",
+    "reserved (24)",            "reserved (25)",
+    "reserved (26)",            "reserved (27)",
+    "hypervisor injection",     "VMM communication",
+    "security exception",       "reserved (31)",
+};
+
+pub fn vectorName(vector: u64) []const u8 {
+    return if (vector < names.len) names[vector] else "unknown";
+}
+
+/// A 64-bit IDT gate descriptor (16 bytes).
+const Gate = packed struct {
+    offset_low: u16,
+    selector: u16,
+    ist: u8, // interrupt-stack-table index; 0 = use the current stack
+    flags: u8, // present, DPL, gate type
+    offset_mid: u16,
+    offset_high: u32,
+    reserved: u32 = 0,
+};
+
+var idt = [_]Gate{std.mem.zeroes(Gate)} ** 256;
+
+const Descriptor = packed struct {
+    limit: u16,
+    base: u64,
+};
+
+/// Loads the IDT (`lidt`). Defined in isr.s.
+extern fn idt_flush(descriptor: *const Descriptor) callconv(.c) void;
+
+fn setGate(vector: usize, handler: u64) void {
+    idt[vector] = .{
+        .offset_low = @truncate(handler),
+        .selector = gdt.kernel_code,
+        .ist = 0,
+        .flags = 0x8E, // present, ring 0, 64-bit interrupt gate
+        .offset_mid = @truncate(handler >> 16),
+        .offset_high = @truncate(handler >> 32),
+    };
+}
+
+/// Point the first 32 vectors at the stubs defined in isr.s and load the IDT.
+pub fn init() void {
+    inline for (0..32) |vector| {
+        const stub = @extern(*const anyopaque, .{ .name = std.fmt.comptimePrint("isr{d}", .{vector}) });
+        setGate(vector, @intFromPtr(stub));
+    }
+    const descriptor = Descriptor{
+        .limit = @sizeOf(@TypeOf(idt)) - 1,
+        .base = @intFromPtr(&idt),
+    };
+    idt_flush(&descriptor);
+}
+
+/// Called by isr_common (isr.s) with a pointer to the trap frame. Exported so the
+/// assembly stubs can `call` it by name.
+export fn exceptionHandler(state: *const CpuState) callconv(.c) void {
+    on_fault(state);
+}
+
+const std = @import("std");