docs: security track live state — HS green at 113
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@ -36,11 +36,11 @@ plain `main` checkout always tells the truth about where the work is.**
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| Working on | **HS** — SYSRET canonical-RIP guard |
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| Working on | **H3** — SMAP (the last phase) |
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| Branch carrying it | `feat/security-group-4` (pushed to origin) |
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| Branch carrying it | `feat/security-group-4` (pushed to origin) |
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| On `main` | everything through P4c — groups 1, 2 and 3 merged |
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| On `main` | everything through P4c — groups 1, 2 and 3 merged |
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| Awaiting merge | H2 — lands with the group 4 merge |
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| Awaiting merge | H2, HS — land with the group 4 merge |
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| Suite | 112 cases, all passing |
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| Suite | 113 cases, all passing |
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| Last updated | 2026-08-01 |
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| Last updated | 2026-08-01 |
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A checkbox below means the phase met its definition of green and was
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A checkbox below means the phase met its definition of green and was
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@ -81,7 +81,20 @@ group boundary.
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refusal paired with a control; suite 111/111)
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refusal paired with a control; suite 111/111)
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- [x] **merge** group 3 → main, push
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- [x] **merge** group 3 → main, push
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- [x] **H2** — SMEP on every core (shared CPUID helper; CR4 bit 20 set in the per-CPU bring-up both the BSP and every AP run, asserted per core by the smp case; ring-0-executes-user-pages audit clean incl. the pre-paging window on the loader's tables; fail-open with a posture line; `-cpu max` added to the harness since QEMU's default model has neither bit; new `fault-smep` case; suite 112/112)
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- [x] **H2** — SMEP on every core (shared CPUID helper; CR4 bit 20 set in the per-CPU bring-up both the BSP and every AP run, asserted per core by the smp case; ring-0-executes-user-pages audit clean incl. the pre-paging window on the loader's tables; fail-open with a posture line; `-cpu max` added to the harness since QEMU's default model has neither bit; new `fault-smep` case; suite 112/112)
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- [ ] **HS** — SYSRET canonical-RIP guard
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- [x] **HS** — SYSRET canonical-RIP guard (the syscall exit sign-extends the
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return RIP from bit 47 and returns through `iretq` when that changes it —
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four register ALU ops and a never-taken branch on the hot path, no load; the
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fallback un-pops the rip slot so `iretq` consumes the frame entry already
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built, reloads R11 from the rflags slot, and keeps the `swapgs` in the same
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place relative to the ring change. 4-level is not an assumption but a fact:
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nothing sets CR4.LA57, and the comment says what a 5-level port must change.
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Ring 3 **can** reach the hazard — `syscall` as the last two bytes of the last
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canonical page returns to `user_half_end` — so the new `sysret-canonical`
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case is a real ring-3 probe doing exactly that, and dies of a ring-3 #GP at
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`0x0000800000000000` while the kernel runs on. Its teeth are the refusal
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counter, not the outcome: measured with the guard's branch removed, TCG does
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not model Intel's ring-0 #GP and every outcome check still passed. Suite
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113/113)
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- [ ] **H3** — SMAP + boot-patched `clac`; `-cpu max` in the harness; negative tests
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- [ ] **H3** — SMAP + boot-patched `clac`; `-cpu max` in the harness; negative tests
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- [ ] **merge** group 4 → main, push
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- [ ] **merge** group 4 → main, push
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@ -518,6 +531,8 @@ put the text in `expect`, per `qemu_test.py:189`). Suite 112.
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**Test:** kernel unit case driving a thread whose return RIP is forged
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**Test:** kernel unit case driving a thread whose return RIP is forged
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non-canonical via the syscall path if constructible cheaply; otherwise the
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non-canonical via the syscall path if constructible cheaply; otherwise the
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review-level proof plus the existing fault cases regression. Suite 112.
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review-level proof plus the existing fault cases regression. Suite 112.
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*(Landed: it was constructible, and from ring 3 rather than by forgery — the
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`sysret-canonical` case, suite 113.)*
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## H3 — SMAP
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## H3 — SMAP
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@ -532,7 +547,7 @@ review-level proof plus the existing fault cases regression. Suite 112.
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**Test:** new QEMU case `fault-smap`: ring-0 deliberate read of a mapped
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**Test:** new QEMU case `fault-smap`: ring-0 deliberate read of a mapped
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user page; expect vector 14 + `error code : 0x1` + kernel IP. And the
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user page; expect vector 14 + `error code : 0x1` + kernel IP. And the
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whole suite becomes the tripwire — any missed straggler now fails loudly.
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whole suite becomes the tripwire — any missed straggler now fails loudly.
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Suite 113.
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Suite 114 (HS added one).
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---
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---
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