M11–M12: IRQ-as-IPC and bus drivers; expand names tree-wide
Two driver-model milestones plus a tree-wide naming pass. Suite 35/35 (QEMU) + host tests green. M11 — IRQ-as-IPC. A ring-3 driver now sleeps until its device interrupts it. New src/kernel/irq.zig: per-GSI endpoint bindings, comptime per-vector trampolines, dispatch = mask GSI -> LAPIC EOI -> notifyLocked, all under one lock region. irq_bind/irq_ack syscalls, gated by the device claim like mmio_map. interruptDispatch no longer EOIs — each handler owns its EOI, because a level line must be masked before it is acknowledged (irq_ack is the unmask). Bindings are keyed on the owning task and released on exit (a shared endpoint's siblings survive). hpetd rewritten interrupt-driven. Tests: hpet (rewritten, reads back the I/O APIC routing) and irqfree. M12 — bus drivers. DeviceDesc gains a parent, making the device table a tree. dev_register (device_register) lets a process publish children below a device it claimed; the kernel enforces resource containment (a child's resources must nest in its parent's), so a descriptor can't fabricate a window over kernel RAM. Descriptor copied in via copyFromUser (physmap walk — an unmapped user pointer fails the call instead of faulting the kernel). Per-parent child cap bounds table exhaustion. sbin/busd.zig is a worked bus driver. Test: bus. Naming — per docs/coding-standards.md: non-acronym abbreviations spelled out (message, descriptor, device_service, scheduler, runtime, physical, interpreter, ...); acronyms kept (IPC, MMIO, DMA, HCD, ...); files are kebab-case (ipc-synchronous.zig, device-service.zig, vfs-protocol.zig, ...). Exceptions: POSIX/C ABI names and Zig idioms (init/len/ptr) kept. Module collisions resolved by specific naming (config -> parameters, device.zig alias -> device_model). AML op/Op disambiguated: op = opcode, Op = operation; per-opcode parse handlers renamed opX -> parseX. New driver docs: drivers.md, driver-model.md (bus/class/HCD shapes + the proposed M13–M16 ABI), coding-standards.md.
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@@ -89,7 +89,6 @@ if (state.vector < 32) {
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on_fault(state); // exception: report and halt (never returns)
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} else if (handlers[state.vector]) |handler| {
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handler(); // device: run the registered handler
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apic.eoi(); // ...acknowledge the LAPIC
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}
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// else: spurious/unhandled — deliberately no EOI
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```
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@@ -100,10 +99,23 @@ Two things make device interrupts *return* where exceptions don't:
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flows back to `isr_common`, which restores every register it saved and executes
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`iretq` — resuming the interrupted instruction exactly. (This is why the stub
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saves *all* the general registers.)
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2. **End-of-interrupt.** After handling, we write the LAPIC's EOI register. Miss
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2. **End-of-interrupt.** Somewhere in there we write the LAPIC's EOI register. Miss
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this and the LAPIC thinks we're still busy and never delivers the next
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interrupt. It's the single most common "my timer fired once and stopped" bug.
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**Each handler issues its own EOI**, rather than the dispatcher doing it around the
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call. That looks like a needless devolution while the timer is the only device, and
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`apic.timerTick` indeed does nothing but `eoi()` before bumping its counter (early,
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because the tick hook is the scheduler, which may switch tasks and not return
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promptly — the LAPIC mustn't wait on it).
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It stops looking needless with the second device. A *routed* interrupt — one arriving
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through the I/O APIC from a real device line — must be **masked before it is
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acknowledged**, because a level-triggered line is still asserted at EOI time and would
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redeliver instantly, forever. Only the handler knows which discipline its source
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needs, so only the handler can sequence it. See [drivers.md](drivers.md), where the
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device is quieted by a driver in ring 3, long after the ISR has returned.
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A device handler is a plain `fn () void` — a timer or keyboard handler doesn't need
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the interrupted registers. (Note: the stubs don't save the SSE/vector registers, so
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a handler must not use them; ours don't.)
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@@ -131,14 +143,23 @@ If the APIC weren't enabled, or `sti` were missing, or EOI were forgotten, the
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count would stay put and the test would fail. That it advances — while the CPU was
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spinning in unrelated code — is the whole mechanism working end to end.
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## Since (done elsewhere)
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- **Preemption**: the timer handler is where the scheduler decides to switch — the
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reason a *returning* interrupt matters. See [scheduling.md](scheduling.md).
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- **`sleep()` / timeouts** built on the calibrated clock.
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- **The I/O APIC, routed**: external device lines now reach a vector, and the
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interrupt is delivered onward to a *user-space* driver as an IPC message. See
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[drivers.md](drivers.md).
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- **Uncacheable MMIO**: device grants are mapped `PCD|PWT` (strong-uncacheable) for
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user drivers — see [paging.md](paging.md).
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## What's next (not done here)
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- **The keyboard**: bring up the IO-APIC, route its IRQ to a vector, and read
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scancodes from the PS/2 controller — the first *input* device.
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- **`sleep()` / timeouts** built on the calibrated clock (the monotonic
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`uptimeMs()` is in place).
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- **Uncacheable MMIO**: the LAPIC page is currently mapped writeback-cacheable like
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the rest of the identity map. QEMU tolerates it, but real hardware wants MMIO
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marked uncacheable (via the page's cache bits or an MTRR).
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- **Preemption**: once there are tasks, the timer handler is where the scheduler
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decides to switch — the reason a *returning* interrupt matters.
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- **The keyboard**: the PS/2 controller is port-mapped (`0x60`/`0x64`), and ring 3
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has no port I/O yet, so the first *input* device is blocked on either an I/O
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permission bitmap or `io_in`/`io_out` syscalls ([drivers.md](drivers.md)).
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- **MSI/MSI-X**: per-device vectors, edge-triggered and unshared, which retire the
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I/O APIC's mask/ack cycle and its 24-GSI ceiling.
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- **The LAPIC's own page** is still mapped writeback-cacheable like the rest of the
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identity map. QEMU tolerates it; real hardware wants it uncacheable.
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