schedule tasks across all cores

Per-core GDT/TSS and AP scheduler entry; fix AP SSE + single_threaded.

src/kernel/arch/x86_64/trampoline.s

@@ -59,10 +59,20 @@ prot_entry:
     movw %ax, %fs
     movw %ax, %gs
 
-    movl %cr4, %eax         # PAE on (CR4.PAE) — required for long mode
-    orl $(1 << 5), %eax
+    # CR4: PAE (required for long mode) + OSFXSR/OSXMMEXCPT. The kernel is built with
+    # SSE (part of the x86_64 baseline), and the compiler emits SSE for things as
+    # ordinary as a struct copy — without OSFXSR those instructions #UD. The BSP got
+    # these bits from UEFI; an AP starts fresh, so we must set them ourselves.
+    movl %cr4, %eax
+    orl $((1 << 5) | (1 << 9) | (1 << 10)), %eax
     movl %eax, %cr4
 
+    # CR0: clear EM (no x87 emulation) and set MP, so SSE/x87 don't fault.
+    movl %cr0, %eax
+    andl $~(1 << 2), %eax   # ~EM
+    orl $(1 << 1), %eax     # MP
+    movl %eax, %cr0
+
     movl (param_cr3 - ap_trampoline_start)(%ebx), %eax  # kernel page tables
     movl %eax, %cr3