M15: interrupts for PCI devices (ECAM config space + MSI)

Two parts, both blockers for real PCI drivers.

ECAM config space per function: enumeratePci now gives every pci_device its own 4 KiB
configuration window as resource 0. A claimed PCI driver mmio_maps that to reach its
command register, BARs, and — the point — its capability list (MSI/MSI-X, PCIe extended
caps), with no new syscall. Verified in the discovery test (QEMU q35's functions each
carry it).

MSI: msi_bind(device_id, endpoint) -> address (rax), data (rdx) allocates a per-device
edge-triggered vector, binds it to the endpoint, and returns the (address, data) the
driver programs into its own MSI capability. Unlike irq_bind there's no GSI, no I/O APIC
entry, no sharing, and no ack cycle — dispatch recognises an MSI vector (vector_gsi ==
none, msi_bound set), EOIs, and notifies. Owner-keyed release drops the binding on exit.
Legacy INTx (_PRT parsing + shared lines) is deliberately skipped; MSI is the real
answer.

QEMU's HPET has no MSI, so the new `msi` test proves the vector-routing path with a
self-IPI (new apic.selfIpi) standing in for the device's MSI write: bind a vector,
fire it, the bound endpoint is notified. The msi_bind syscall wraps irq.msiBind with
the claim check and lands its first real use with the first PCI driver. Suite 39/39
plus host tests.

system/kernel/architecture/x86_64/apic.zig

@@ -160,6 +160,15 @@ fn waitIcrIdle() void {
     while (read(register_icr_low) & icr_delivery_pending != 0) {}
 }
 
+/// Send this core a fixed interrupt at `vector` (the "self" destination shorthand). A
+/// device raises an MSI by writing its (address, data) to the LAPIC; with no such
+/// device on QEMU's HPET, a self-IPI is the stand-in that lets the MSI vector-routing
+/// path be tested end to end. Shorthand self (bits 19:18 = 01) | assert (bit 14).
+pub fn selfIpi(vector: u8) void {
+    write(register_icr_low, 0x4_4000 | @as(u32, vector));
+    waitIcrIdle();
+}
+
 /// The calibration window: we time everything against a 10 ms reference interval.
 const calib_ms = 10;