moving kernel code to kernel/

src/kernel/arch/x86_64/linker.ld

@@ -0,0 +1,47 @@
+/* Kernel link layout.
+ *
+ * The kernel is linked at a fixed low physical address (set by `image_base` in
+ * build.zig). UEFI runs with memory identity-mapped, so the bootloader can load
+ * each PT_LOAD segment to the physical address matching its virtual address and
+ * jump straight to _start — no page tables to build yet. (Moving to a
+ * higher-half virtual base is a later step, once the bootloader sets up paging.)
+ */
+
+ENTRY(_start)
+
+/* One loadable segment per permission set, so the loader can map .text as R+X,
+ * .rodata as R, and .data/.bss as R+W. FLAGS bits: 1=X, 2=W, 4=R. */
+PHDRS {
+    text   PT_LOAD FLAGS(5); /* R + X */
+    rodata PT_LOAD FLAGS(4); /* R     */
+    data   PT_LOAD FLAGS(6); /* R + W */
+}
+
+SECTIONS {
+    .text ALIGN(4K) : {
+        *(.text .text.*)
+    } :text
+
+    .rodata ALIGN(4K) : {
+        *(.rodata .rodata.*)
+    } :rodata
+
+    .data ALIGN(4K) : {
+        *(.data .data.*)
+    } :data
+
+    /* .bss occupies memory but not file space. The loader zeroes it via the
+     * gap between each PT_LOAD segment's file size and memory size, so no
+     * boundary symbols are needed here. (Zig's self-hosted linker also does not
+     * yet honour linker-script symbol assignments.) */
+    .bss ALIGN(4K) : {
+        *(.bss .bss.*)
+        *(COMMON)
+    } :data
+
+    /DISCARD/ : {
+        *(.comment)
+        *(.note .note.*)
+        *(.eh_frame .eh_frame_hdr)
+    }
+}