M3 step 2: swapgs discipline + arch per-CPU block

The GS base now points at an arch-owned ArchPerCpu (percpu.zig) holding
the kernel RSP and a scratch slot (for the coming syscall stub, at fixed
%gs offsets) plus the scheduler pointer. isr_common conditionally
swapgs's on entry/exit when the interrupted frame was ring 3, and
enter_user swapgs's before dropping to ring 3 — so kernel code always
sees the kernel GS base and a ring-3 `mov %ax,%gs` can no longer poison
cpuLocal(). No swapgs on ring-0 interrupts (the common case). Suite
27/27, including int 0x80 from ring 3 and faults.

Co-Authored-By: Claude Fable 5 <noreply@anthropic.com>

src/kernel/scheduler.zig

@@ -104,7 +104,7 @@ var preemption_enabled = true;
 pub fn init(boot_priority: Priority) void {
     const pc = &cpus[0];
     pc.* = .{ .index = 0, .online = true, .loaded_pml4 = arch.kernelPageTable() };
-    arch.setCpuLocal(@intFromPtr(pc));
+    arch.setCpuLocal(0, @intFromPtr(pc));
     tasks[0] = .{ .id = 0, .state = .running, .priority = boot_priority };
     pc.current = &tasks[0];
     pc.idle = create(idle, 0, null); // this core's idle task: always ready, lowest priority