add multi-sink diagnostic log; make framebuffer optional

src/kernel/arch/x86_64/cpu.zig

@@ -28,6 +28,25 @@ pub fn serialWrite(bytes: []const u8) void {
     serial.write(bytes);
 }
 
+/// Emit a one-byte checkpoint to the POST diagnostic port (0x80). A POST card or
+/// BMC displays it; it's the last-resort progress signal when there's no text
+/// output at all. Writing 0x80 is universally safe (it's the legacy I/O-delay port).
+pub fn postCode(code: u8) void {
+    io.outb(0x80, code);
+}
+
+/// Whether a Bochs/QEMU-style debug console is on port 0xE9 (it returns 0xE9 when
+/// read). On real hardware the port reads back 0xFF, so this stays false — a safe
+/// probe before we write to it.
+pub fn debugconPresent() bool {
+    return io.inb(0xE9) == 0xE9;
+}
+
+/// Output sink: write bytes to the 0xE9 debug console (see `debugconPresent`).
+pub fn debugconWrite(bytes: []const u8) void {
+    for (bytes) |b| io.outb(0xE9, b);
+}
+
 /// Set up the CPU's descriptor tables: our own GDT, the TSS (with an interrupt
 /// stack for double faults), then the IDT with exception handlers. After this a
 /// CPU fault is reported instead of triple-faulting. Install the fault handler