Rename the shared contract module danos -> system; QEMU logs to /var/log/system

The shared kernel<->user ABI contract (BootInformation, the SystemCall numbers, DeviceDescriptor, page_size, ...) is now the `system` module at system/system.zig, following the convention that a directory's root file takes the directory's name. One overlap to note: the runtime's syscall wrappers are already `runtime.system`, so the single file that uses both the contract and those wrappers (library/runtime/heap.zig) aliases the wrappers locally as `system_calls`. The two are distinct (top-level `system` vs `runtime.system`); everywhere else the contract is just `system`. Also: the QEMU run's serial capture now lands in the FHS log location, zig-out/var/log/system/serial0-<timestamp>.log — a stand-in for the kernel's own logging system, which will eventually write there itself. Suite 35/35 plus host tests green.
2026-07-10 14:09:38 +01:00
parent 3d1de37d0e
commit d19a0ae38d
38 changed files with 202 additions and 198 deletions
@@ -9,7 +9,7 @@
 //! map). Every interrupt must be acknowledged with an end-of-interrupt write, or
 //! the LAPIC won't deliver the next one.

-const danos = @import("danos");
+const system = @import("system");
 const io = @import("io.zig");
 const paging = @import("paging.zig");

@@ -121,7 +121,7 @@ pub fn init() void {

    const msr = io.rdmsr(ia32_apic_base_msr);
    // Reach the LAPIC through the physmap (paging.init maps its page there).
-    base = @intCast(danos.physicalToVirtual(msr & 0xFFFFF000)); // physical base is bits 12+
+    base = @intCast(system.physicalToVirtual(msr & 0xFFFFF000)); // physical base is bits 12+
    io.wrmsr(ia32_apic_base_msr, msr | (1 << 11)); // global enable

    write(register_spurious, 0x100 | spurious_vector); // bit 8 = software enable
@@ -4,7 +4,7 @@
 //! build.zig — no change to the generic code. Keep everything CPU-specific here
 //! (halt, the descriptor tables, later paging), and nothing generic.

-const danos = @import("danos");
+const system = @import("system");
 const parameters = @import("parameters");
 const gdt = @import("gdt.zig");
 const tss = @import("tss.zig");
@@ -132,7 +132,7 @@ pub fn init() void {
 /// Build the kernel's own page tables (with real permissions) and switch onto
 /// them. Needs the frame allocator and the boot info (for the memory map and the
 /// kernel's segment layout). Call once the frame allocator is up.
-pub fn enablePaging(allocFrame: *const fn () ?u64, freeFrame: *const fn (u64) void, boot_information: *const danos.BootInformation) void {
+pub fn enablePaging(allocFrame: *const fn () ?u64, freeFrame: *const fn (u64) void, boot_information: *const system.BootInformation) void {
    paging.init(allocFrame, freeFrame, boot_information);
 }

@@ -10,10 +10,10 @@
 //! Everything is 4 KiB pages — precise and simple; the extra table memory is
 //! negligible against available RAM.

-const danos = @import("danos");
+const system = @import("system");
 const io = @import("io.zig");

-const page_size = danos.page_size;
+const page_size = system.page_size;

 // Page-table entry bits.
 const present: u64 = 1 << 0;
@@ -58,7 +58,7 @@ const bootstrap_physmap_limit: u64 = 4 << 30;
 /// both the loader's bootstrap tables and the kernel's own, which share the
 /// physmap base.
 fn tableAt(physical: u64) *[512]u64 {
-    return @ptrFromInt(danos.physicalToVirtual(physical));
+    return @ptrFromInt(system.physicalToVirtual(physical));
 }

 fn allocTable() u64 {
@@ -102,12 +102,12 @@ fn mapRangePhysmap(pml4: u64, physical_base: u64, len: u64, flags: u64) void {
    var address = physical_base & ~@as(u64, page_size - 1);
    const end = physical_base + len;
    while (address < end) : (address += page_size) {
-        mapPage(pml4, danos.physicalToVirtual(address), address, flags);
+        mapPage(pml4, system.physicalToVirtual(address), address, flags);
    }
 }

-fn regions(mm: danos.MemoryMap) []const danos.MemoryRegion {
-    return @as([*]const danos.MemoryRegion, @ptrFromInt(danos.physicalToVirtual(mm.regions)))[0..mm.len];
+fn regions(mm: system.MemoryMap) []const system.MemoryRegion {
+    return @as([*]const system.MemoryRegion, @ptrFromInt(system.physicalToVirtual(mm.regions)))[0..mm.len];
 }

 /// Enable the NX bit in the page-table format (EFER.NXE). Must happen before we
@@ -118,7 +118,7 @@ fn enableNx() void {
 }

 /// Build the address space and switch onto it.
-pub fn init(allocFrame: *const fn () ?u64, freeFrame: *const fn (u64) void, boot_information: *const danos.BootInformation) void {
+pub fn init(allocFrame: *const fn () ?u64, freeFrame: *const fn (u64) void, boot_information: *const system.BootInformation) void {
    alloc_frame = allocFrame;
    free_frame = freeFrame;
    enableNx();
@@ -136,7 +136,7 @@ pub fn init(allocFrame: *const fn () ?u64, freeFrame: *const fn (u64) void, boot
    //    the kernel touches directly), RW + NX.
    const fb = boot_information.framebuffer;
    mapRangePhysmap(pml4, fb.base, @as(u64, fb.height) * fb.pitch, present | writable | no_execute);
-    mapPage(pml4, danos.physicalToVirtual(0xFEE00000), 0xFEE00000, present | writable | no_execute);
+    mapPage(pml4, system.physicalToVirtual(0xFEE00000), 0xFEE00000, present | writable | no_execute);

    // 3. The kernel's own segments at their higher-half link addresses, mapped
    //    to their low physical load addresses with real ELF permissions: code
@@ -206,11 +206,11 @@ pub fn mapMmio(physical: u64, len: u64, writable_page: bool) u64 {
    const last = physical + (if (len == 0) 1 else len) - 1;
    var address = first;
    while (address <= (last & ~@as(u64, page_size - 1))) : (address += page_size) {
-        const virtual = danos.physicalToVirtual(address);
+        const virtual = system.physicalToVirtual(address);
        mapPage(kernel_pml4, virtual, address, flags);
        invalidate(virtual);
    }
-    return danos.physicalToVirtual(physical);
+    return system.physicalToVirtual(physical);
 }

 /// Like `descend`, but also sets the U/S bit on the intermediate entry (new or
@@ -13,7 +13,7 @@
 //! Once a core has its own descriptor tables, LAPIC, and timer, it calls the generic
 //! scheduler entry and joins the run loop — mechanism here, policy there.

-const danos = @import("danos");
+const system = @import("system");
 const io = @import("io.zig");
 const gdt = @import("gdt.zig");
 const tss = @import("tss.zig");
@@ -85,7 +85,7 @@ fn arm() void {
    const start = @extern([*]const u8, .{ .name = "ap_trampoline_start" });
    const end = @extern([*]const u8, .{ .name = "ap_trampoline_end" });
    const len = @intFromPtr(end) - @intFromPtr(start);
-    const destination: [*]u8 = @ptrFromInt(danos.physicalToVirtual(tramp_physical));
+    const destination: [*]u8 = @ptrFromInt(system.physicalToVirtual(tramp_physical));
    @memcpy(destination[0..len], start[0..len]);
 }

@@ -95,7 +95,7 @@ fn arm() void {
 /// reported in — it's long past the trampoline by then, in the kernel image; a
 /// core that never answered is dead and can't be mid-climb.
 fn disarm() void {
-    const destination: [*]u8 = @ptrFromInt(danos.physicalToVirtual(tramp_physical));
+    const destination: [*]u8 = @ptrFromInt(system.physicalToVirtual(tramp_physical));
    @memset(destination[0..page_size], 0);
    paging.unmap(tramp_physical); // drop the transient low identity mapping
 }
@@ -107,7 +107,7 @@ fn disarm() void {
 fn param(comptime name: []const u8) *align(1) volatile u64 {
    const start = @intFromPtr(@extern([*]const u8, .{ .name = "ap_trampoline_start" }));
    const sym = @intFromPtr(@extern([*]const u8, .{ .name = name }));
-    return @ptrFromInt(danos.physicalToVirtual(tramp_physical + (sym - start)));
+    return @ptrFromInt(system.physicalToVirtual(tramp_physical + (sym - start)));
 }

 /// Wake the core with Local APIC id `apic_id` as dense CPU `index`, hand it