M2 step 4: relink the kernel into the higher half
The kernel now links at 0xFFFF_FFFF_8000_0000 (code_model .kernel) and loads low via the linker script's AT() clauses (.text at 1 MiB). A new asm _start installs a 64 KiB kernel-owned .bss stack — the loader stack is a low address that goes away with the identity map — and calls the Zig entry, which reaches boot_info through the physmap. The user-pf test blob reads the LAPIC through the physmap window (still present|user, ec 0x5). The low identity map still coexists in the kernel's tables as the safety net. Suite 27/27. Co-Authored-By: Claude Fable 5 <noreply@anthropic.com>
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co-authored by
Claude Fable 5
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724de7bbd0
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f57a73e8a1
@@ -10,6 +10,28 @@
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.text
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# _start: the kernel entry. The loader jumps here (higher-half address) with
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# boot_info in RDI, still on the loader's low stack. Switch to a kernel-owned
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# stack in .bss (the loader stack is a low address that goes away once the low
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# half is dropped), keeping RDI, then call the Zig entry. kmainEntry never
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# returns; the hlt loop is a belt-and-braces backstop.
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.global _start
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_start:
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leaq bootstrap_stack_top(%rip), %rsp
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call kmainEntry
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1: hlt
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jmp 1b
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# The kernel's initial stack (used until the scheduler hands each task its own).
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# 64 KiB: kmain's discovery path includes the recursive AML interpreter, so it
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# needs more than a token stack. Lives in .bss (zeroed, higher-half).
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.section .bss
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.balign 16
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bootstrap_stack:
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.skip 65536
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bootstrap_stack_top:
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.text
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# gdt_flush(rdi = *GDT descriptor): load the GDT, reload the data segment
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# registers to the data selector, and reload CS to the code selector. CS can't be
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# set with mov, so we far-return through the caller's own return address.
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@@ -152,14 +174,14 @@ user_prog_start:
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user_prog_end:
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# The isolation-proof program: read a kernel-only page from ring 3. The LAPIC
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# page is unconditionally mapped supervisor (paging.zig), so this must take a
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# #PF with error code 0x5 (present | user) before any access happens. The
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# address goes through %ecx (zero-extending) — an absolute `mov 0xFEE00000,%rax`
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# would sign-extend the disp32 to 0xFFFFFFFF_FEE00000 and miss the page.
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# lives in the kernel's physmap (physmap_base + 0xFEE00000) as a supervisor
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# page, so this must take a #PF with error code 0x5 (present | user) before any
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# access happens. movabs loads the full 64-bit higher-half address (a disp32
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# would sign-extend and miss).
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.global user_pf_start
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.global user_pf_end
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user_pf_start:
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mov $0xFEE00000, %ecx
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movabs $0xFFFF8800FEE00000, %rcx
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mov (%rcx), %rax
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1: jmp 1b
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user_pf_end:
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@@ -1,12 +1,18 @@
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/* Kernel link layout.
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/* Kernel link layout — higher half.
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*
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* The kernel is linked at a fixed low physical address (set by `image_base` in
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* build.zig). UEFI runs with memory identity-mapped, so the bootloader can load
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* each PT_LOAD segment to the physical address matching its virtual address and
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* jump straight to _start — no page tables to build yet. (Moving to a
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* higher-half virtual base is a later step, once the bootloader sets up paging.)
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* The kernel is linked to *run* in the higher half (virtual base
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* 0xFFFF_FFFF_8000_0000, matching danos.kernel_virt_base and build.zig's
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* image_base) but is *loaded* low. Each section's load address (LMA) is its
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* virtual address minus KERNEL_VIRT_BASE via AT(), so the ELF's p_paddr lands
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* at a low physical address (.text at 1 MiB) that the loader can allocate and
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* copy into. The loader maps p_vaddr (high) -> p_paddr (low) in its bootstrap
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* tables and jumps to the high entry; the kernel then builds its own tables
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* with the physmap and abandons the identity map. Requires LLD (build.zig pins
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* it) — the self-hosted linker ignores PHDRS/AT()/section order.
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*/
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KERNEL_VIRT_BASE = 0xFFFFFFFF80000000;
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ENTRY(_start)
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/* One loadable segment per permission set, so the loader can map .text as R+X,
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@@ -18,23 +24,22 @@ PHDRS {
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}
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SECTIONS {
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.text ALIGN(4K) : {
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.text ALIGN(4K) : AT(ADDR(.text) - KERNEL_VIRT_BASE) {
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*(.text .text.*)
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} :text
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.rodata ALIGN(4K) : {
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.rodata ALIGN(4K) : AT(ADDR(.rodata) - KERNEL_VIRT_BASE) {
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*(.rodata .rodata.*)
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} :rodata
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.data ALIGN(4K) : {
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.data ALIGN(4K) : AT(ADDR(.data) - KERNEL_VIRT_BASE) {
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*(.data .data.*)
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} :data
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/* .bss occupies memory but not file space. The loader zeroes it via the
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* gap between each PT_LOAD segment's file size and memory size, so no
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* boundary symbols are needed here. (Zig's self-hosted linker also does not
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* yet honour linker-script symbol assignments.) */
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.bss ALIGN(4K) : {
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* boundary symbols are needed here. */
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.bss ALIGN(4K) : AT(ADDR(.bss) - KERNEL_VIRT_BASE) {
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*(.bss .bss.*)
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*(COMMON)
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} :data
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+7
-5
@@ -40,11 +40,13 @@ var ap_trampoline_page: u64 = 0;
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/// Kernel entry point. The bootloader jumps here after `ExitBootServices` with a
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/// pointer to the handoff data. There is no runtime, no stack unwinding, and no
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/// caller to return to, so this never returns.
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export fn _start(boot_info: *const BootInfo) callconv(kernel_abi) noreturn {
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// The loader passes a low physical pointer (its own stack). Reach it — and
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// everything it points at — through the physmap, so it stays valid once the
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// low identity map is gone. The physmap base is the same under the loader's
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// bootstrap tables and the kernel's own.
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/// The real entry (`_start`, in isr.s) installs a kernel-owned stack in .bss
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/// then calls this with the loader's `boot_info` pointer in RDI. We can't keep
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/// running on the loader's stack: it's a low physical address that the identity
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/// map covers only transitionally, and vanishes once the kernel drops the low
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/// half. `boot_info` (also low) is reached through the physmap — its base is the
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/// same under the loader's bootstrap tables and the kernel's own.
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export fn kmainEntry(boot_info: *const BootInfo) callconv(kernel_abi) noreturn {
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kmain(@ptrFromInt(danos.physToVirt(@intFromPtr(boot_info))));
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}
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