kernel: the IOMMU backends move behind the architecture boundary
VT-d and AMD-Vi are x86 hardware, but lived in the architecture-neutral kernel tree and leaked further: the core's public Kind enum named both vendors, and the ACPI parser read the VT-d version/capability registers (raw volatile MMIO inside table discovery). Now the vendor backends live in architecture/x86_64/ behind architecture.iommu — the core hands over the discovery facts plus an injected environment (frame allocation + the log sink, the same pattern enablePaging uses) and receives the hardware vtable back, so the backends never import kernel internals and an ARM port supplies its SMMU with no core change. Discovery keeps table facts only; the live-unit register check moved into VT-d detect (version reading zero now stays fail-open). The unused kindOf() is gone. Log shapes the harness pins (iommu online, DANOS-IOMMU-FAULT) are unchanged; all five IOMMU QEMU cases pass.
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@@ -1253,11 +1253,10 @@ fn iommuTest() void {
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const pinfo = platform.platformInformation();
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check("IOMMU found in the firmware tables", pinfo.iommu_present);
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check("IOMMU unit has a register base", pinfo.iommu_base != 0);
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// The VT-d version register is a live-unit sanity check; AMD-Vi (from IVRS) records
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// no version, so gate it on the vendor.
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if (!pinfo.iommu_is_amd)
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check("VT-d version register reads back nonzero (real, mappable unit)", pinfo.iommu_version != 0);
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log("DANOS-IOMMU: base=0x{x} version=0x{x} capabilities=0x{x}\n", .{ pinfo.iommu_base, pinfo.iommu_version, pinfo.iommu_capabilities });
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// The live-unit sanity (the version register reading back nonzero) now
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// gates detect itself: an unusable unit stays fail-open, so `enabled()`
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// below subsumes the old vendor-gated register check.
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log("DANOS-IOMMU: base=0x{x}\n", .{pinfo.iommu_base});
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// Translation was enabled at boot (kernel.zig: iommu.init before any driver claims
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// a device). The blanket domain keeps every device identity-mapped, so DMA still
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