89 lines
4.0 KiB
Zig
89 lines
4.0 KiB
Zig
//! The firmware-agnostic discovery facade.
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//!
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//! The kernel calls `platform.discover()` and gets back a generic `DeviceTree`
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//! without ever naming ACPI or device-tree — the same way it imports `architecture`
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//! without naming x86_64. Which backend runs is decided *at runtime* from what
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//! the bootloader handed us (an ACPI RSDP today, a device-tree blob later),
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//! because a single image — a future ARM kernel especially — may boot under
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//! either firmware. That's a deliberate divergence from `architecture`, which is a
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//! compile-time choice.
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const std = @import("std");
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const boot_handoff = @import("boot-handoff");
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const device_model = @import("device-model.zig");
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const acpi = @import("acpi.zig");
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const power = @import("power.zig");
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const devicetree = @import("device-tree.zig");
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pub const DeviceTree = device_model.DeviceTree;
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pub const Device = device_model.Device;
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pub const DeviceClass = device_model.DeviceClass;
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pub const Resource = device_model.Resource;
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pub const ResourceKind = device_model.ResourceKind;
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pub const Hal = device_model.Hal;
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pub const PowerInformation = acpi.PowerInformation;
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pub const PlatformInformation = acpi.PlatformInformation;
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pub const RegisterAccess = acpi.RegisterAccess;
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pub const IsoEntry = acpi.IsoEntry;
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pub const Cpu = acpi.Cpu;
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/// The FADT power register map discovery extracted (PM1 control, reset register),
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/// for kernel reboot and diagnostics. Sleep-state values are userspace's (S5 is
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/// owned by the ring-3 acpi service), so they are not here.
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pub fn powerInformation() PowerInformation {
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return acpi.power_information;
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}
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/// The scalar firmware facts the architecture layer needs to avoid legacy assumptions
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/// (8259 presence, LAPIC base, PM timer, SPCR UART, IRQ overrides).
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pub fn platformInformation() PlatformInformation {
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return acpi.platform_information;
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}
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/// The usable logical processors discovered during enumeration — one entry per
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/// core danos may schedule on, each carrying the Local APIC ID an SMP wake targets.
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/// `len` is the hardware's degree of parallelism: how many tasks *could* run at the
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/// same instant once the application processors are started. Today only the
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/// bootstrap processor is actually running, so starting the rest is the pending SMP
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/// step (see docs/smp.md). Borrowed from static storage populated by `discover`.
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pub fn cpus() []const Cpu {
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return acpi.cpu_information.cpus[0..acpi.cpu_information.count];
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}
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/// Non-zero only if enumeration found more processors than the static pool holds
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/// (the surplus were dropped from `cpus()`); surfaced so the cap is never silent.
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pub fn cpusDropped() usize {
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return acpi.cpu_information.dropped;
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}
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/// Enumerate hardware into a fresh device tree. `hal` supplies the hardware
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/// primitives the backend needs (MMIO mapping for PCIe configuration space, port I/O for
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/// ACPI registers); pass the architecture implementation. Errors leave nothing to clean up
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/// beyond the tree's own allocations.
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pub fn discover(
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boot_information: *const boot_handoff.BootInformation,
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allocator: std.mem.Allocator,
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hal: Hal,
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) !DeviceTree {
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var device_tree = try DeviceTree.init(allocator);
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if (boot_information.acpi_rsdp != 0) {
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const memory_regions = @as([*]const boot_handoff.MemoryRegion, @ptrFromInt(boot_handoff.physicalToVirtual(boot_information.memory_map.regions)))[0..boot_information.memory_map.len];
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try acpi.discover(boot_information.acpi_rsdp, memory_regions, &device_tree, hal);
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} else {
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// No ACPI RSDP. A device-tree boot would parse its blob here; today that
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// path is a stub, so this reports the machine described itself no way we
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// understand yet.
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try devicetree.discover(&device_tree);
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}
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return device_tree;
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}
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/// Restart the machine. Never returns on success; returns only if no reset method
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/// worked (extremely unlikely). Backend-agnostic entry the kernel calls. Soft-off
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/// (S5) is not a kernel operation — the ring-3 acpi service owns it (docs/power.md).
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pub fn reboot(hal: Hal) void {
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power.reboot(hal);
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}
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