433 lines
22 KiB
Zig
433 lines
22 KiB
Zig
const std = @import("std");
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const boot_handoff = @import("boot-handoff");
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const abi = @import("abi");
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const parameters = @import("parameters");
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const architecture = @import("architecture");
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const console = @import("console.zig");
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const log = @import("log.zig");
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const pmm = @import("pmm.zig");
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const heap = @import("heap.zig");
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const scheduler = @import("scheduler.zig");
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const process = @import("process.zig");
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const devices_broker = @import("devices-broker.zig");
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const irq = @import("irq.zig");
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const initial_ramdisk = @import("initial-ramdisk");
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const platform = @import("platform");
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const tests = @import("tests.zig");
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const build_options = @import("build_options");
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const BootInformation = boot_handoff.BootInformation;
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/// The calling convention used to enter the kernel. Pinned to SystemV explicitly:
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/// the bootloader is built for the UEFI target, whose C convention is Microsoft
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/// x64 (first argument in RCX), while the kernel is SystemV (first argument in
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/// RDI). Both sides reference this so the `boot_information` pointer lands in the
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/// register the other expects. `boot_handoff.kernel_abi` re-exports it to the loader.
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pub const kernel_abi = boot_handoff.kernel_abi;
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// POST/checkpoint codes emitted to I/O port 0x80 at boot milestones — the
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// last-resort progress signal on a machine with no text output at all.
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const cp_entry = 0x10;
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const cp_paging = 0x20;
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const cp_heap = 0x30;
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const cp_discovery = 0x40;
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const cp_scheduler = 0x50;
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const cp_timer = 0x60;
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const cp_running = 0x70;
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const cp_exception = 0xE0;
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const cp_panic = 0xEE;
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/// Physical address of the low page reserved at boot for the AP trampoline (0 = none
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/// was available). Claimed right after the frame allocator comes up, before paging
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/// and the heap consume the scarce sub-1 MiB frames.
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var ap_trampoline_page: u64 = 0;
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/// Kernel entry point. The bootloader jumps here after `ExitBootServices` with a
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/// pointer to the handoff data. There is no runtime, no stack unwinding, and no
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/// caller to return to, so this never returns.
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/// The real entry (`_start`, in isr.s) installs a kernel-owned stack in .bss
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/// then calls this with the loader's `boot_information` pointer in RDI. We can't keep
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/// running on the loader's stack: it's a low physical address that the identity
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/// map covers only transitionally, and vanishes once the kernel drops the low
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/// half. `boot_information` (also low) is reached through the physmap — its base is the
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/// same under the loader's bootstrap tables and the kernel's own.
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export fn kmainEntry(boot_information: *const BootInformation) callconv(kernel_abi) noreturn {
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kmain(@ptrFromInt(boot_handoff.physicalToVirtual(@intFromPtr(boot_information))));
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}
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fn kmain(boot_information: *const BootInformation) noreturn {
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// The **log** is the machine-readable diagnostic stream: it fans out to every
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// *diagnostic* channel that exists (serial, the 0xE9 debug console, and later a
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// file on a ramdisk/USB/SSD), so a message survives as long as any is present.
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// A headless, serial-less machine still boots correctly — it just goes quiet,
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// with port-0x80 checkpoints as the only progress signal.
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architecture.serialInit();
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log.addSink(architecture.serialWrite);
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if (architecture.debugconPresent()) log.addSink(architecture.debugconWrite);
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// The **framebuffer** is deliberately *not* a log sink. It's a separate output
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// surface — a bootstrap text console today, a graphics device driver later — so
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// we never assume the OS is text-based. Only a few user-facing status lines
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// (via `status`) and panics are mirrored to it; the verbose log stays out.
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const fb = boot_information.framebuffer;
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console.init(fb);
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log.checkpoint(cp_entry);
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// Catch CPU exceptions before doing anything that might fault: install our
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// reporter, then bring up the GDT + IDT.
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architecture.setFaultHandler(onException);
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architecture.init();
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status("danos: initialising kernel...\n");
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log.write(if (console.present())
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"danos: framebuffer console online (bootstrap; graphics driver later)\n"
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else
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"danos: no framebuffer (headless) -> logging to serial/debugcon only\n");
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log.write("danos: cpu tables online (GDT, IDT, TSS)\n");
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log.print(" resolution : {d}x{d}\n", .{ fb.width, fb.height });
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log.print(" pitch : {d} bytes\n", .{fb.pitch});
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log.print(" format : {s}\n", .{@tagName(fb.format)});
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log.print(" framebuffer: 0x{x:0>16}\n", .{fb.base});
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log.print (" footprint : {d} MiB\n", .{(fb.pitch * fb.height) / (1024 * 1024)});
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// Summarise the physical memory the loader handed us. The array is danos's
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// own MemoryRegion, so this is a plain slice — no firmware layout in sight.
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const regions = @as([*]const boot_handoff.MemoryRegion, @ptrFromInt(boot_handoff.physicalToVirtual(boot_information.memory_map.regions)))[0..boot_information.memory_map.len];
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var usable_pages: u64 = 0;
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var reserved_pages: u64 = 0; // reserved RAM only — MMIO is device space, not RAM
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for (regions) |r| {
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switch (r.kind) {
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.usable => usable_pages += r.pages,
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.reserved, .acpi_tables, .acpi_nvs => reserved_pages += r.pages,
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.mmio => {},
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}
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}
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const total_pages = usable_pages + reserved_pages;
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const total_bytes = total_pages * abi.page_size;
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const gib = 1 << 30;
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log.write("\ndanos: physical memory\n");
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log.print(" total RAM : {d}.{d:0>2} GiB ({d} MiB) - RAM the firmware reported\n", .{ total_bytes / gib, (total_bytes % gib) * 100 / gib, mib(total_pages) });
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log.print(" usable : {d} MiB - free RAM (incl. reclaimed boot-services memory)\n", .{mib(usable_pages)});
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log.print(" reserved : {d} MiB - kernel image, boot stack, ACPI, runtime services\n", .{mib(reserved_pages)});
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log.print(" regions : {d} - entries in the firmware memory map\n", .{regions.len});
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// Bring up the physical frame allocator over that map, and prove it works:
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// allocate three frames, then hand them back.
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pmm.init(boot_information.memory_map);
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// Claim the AP trampoline's low (<1 MiB) page *now*, before paging and the heap
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// draw down sub-1 MiB frames (the allocator scans upward from frame 0). Held
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// until SMP bring-up; 0 means none was available (we stay uniprocessor).
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ap_trampoline_page = pmm.allocBelow(0x100000) orelse 0;
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const s1 = pmm.stats();
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log.print("\ndanos: frame allocator online\n", .{});
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log.print(" free frames: {d} ({d} MiB)\n", .{ s1.free_frames, mib(s1.free_frames) });
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const f0 = pmm.alloc();
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const f1 = pmm.alloc();
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const f2 = pmm.alloc();
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log.print(" alloc x3 : 0x{x} 0x{x} 0x{x}\n", .{ f0 orelse 0, f1 orelse 0, f2 orelse 0 });
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if (f0) |p| pmm.free(p);
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if (f1) |p| pmm.free(p);
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if (f2) |p| pmm.free(p);
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log.print(" after free : {d} frames free\n", .{pmm.stats().free_frames});
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// Switch off the firmware's page tables onto our own (with real permissions).
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architecture.enablePaging(pmm.alloc, pmm.free, boot_information);
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log.checkpoint(cp_paging);
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log.print("\ndanos: paging enabled\n", .{});
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log.print(" page tables: root = 0x{x:0>16}\n", .{architecture.activePageTable()});
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log.print(" kernel segs: {d} (mapped with W^X permissions)\n", .{boot_information.kernel_segment_count});
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// Bring up the kernel heap (dynamic allocation), built on the VMM.
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heap.init();
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log.checkpoint(cp_heap);
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log.write("\ndanos: kernel heap online\n");
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// Measure the amount of resources the kernel is actually using
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const s2 = pmm.stats();
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log.print(" Kernel footprint: {d} KiB\n", .{kib(s1.free_frames - s2.free_frames)});
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// Enumerate hardware from the firmware tables (ACPI here) into a generic
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// device tree, then list it. Discovery walks ACPI memory directly (identity-
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// mapped) and maps PCIe configuration space on demand via the VMM. A failure here is
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// not fatal yet — log it and carry on.
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const hal = platform.Hal{
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.mapMmio = architecture.mapMmio,
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.pioRead = architecture.pioRead,
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.pioWrite = architecture.pioWrite,
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};
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if (platform.discover(boot_information, heap.allocator(), hal)) |devtree| {
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var device_tree = devtree;
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log.write("\ndanos: device discovery online\n");
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device_tree.dump(log.write);
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// Snapshot the device tree for user-space drivers (device_enumerate/claim/
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// mmio_map operate on this flat, id-indexed table + claim map).
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devices_broker.init(&device_tree);
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if (devices_broker.dropped > 0) {
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// Otherwise entirely silent: drivers would just never see that hardware.
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log.print("danos: WARNING {d} device(s) dropped — table full\n", .{devices_broker.dropped});
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}
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// Install the device-IRQ trampolines, so a driver's irq_bind has vectors to
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// land on. Every line stays masked until something binds it (ioapic.init).
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irq.init();
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// Power register map extracted from the FADT + AML, for confidence it parsed.
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const pw = platform.powerInformation();
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log.write("danos: power\n");
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log.print(" pm1a_cnt : {s} 0x{x} (width {d})\n", .{ if (pw.pm1a_cnt.mmio) "mmio" else "io", pw.pm1a_cnt.address, pw.pm1a_cnt.width });
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if (pw.s5) |s| {
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log.print(" S5 slp_typ : a={d} b={d}\n", .{ s.slp_typ_a, s.slp_typ_b });
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} else {
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log.write(" S5 slp_typ : (not found)\n");
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}
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log.print(" reset : supported={} {s} 0x{x} val 0x{x}\n", .{ pw.reset_supported, if (pw.reset.mmio) "mmio" else "io", pw.reset.address, pw.reset_value });
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// AML namespace parse integrity: consumed should equal total.
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const am = platform.amlStats();
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log.print(" aml : {d} namespace nodes, parsed {d}/{d} bytes\n", .{ am.nodes, am.consumed, am.total });
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// Feed the architecture layer the discovered addresses/facts so it makes no legacy
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// assumptions — the point of all this on UEFI Class 3 firmware. MMIO bases
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// (HPET, I/O APIC) come from the device tree; scalar facts from ACPI.
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const pinfo = platform.platformInformation();
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const hpet_base: u64 = if (device_tree.firstOfClass(.timer)) |t|
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(if (t.firstResource(.memory)) |r| r.start else 0)
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else
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0;
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var ioapic_base: u64 = 0;
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var ioapic_gsi: u32 = 0;
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if (device_tree.firstOfClass(.interrupt_controller)) |ic| {
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if (ic.firstResource(.memory)) |r| ioapic_base = r.start;
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if (ic.firstResource(.irq)) |r| ioapic_gsi = @intCast(r.start);
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}
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var isos: [16]architecture.IsoEntry = undefined;
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const iso_n = @min(pinfo.override_count, isos.len);
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for (0..iso_n) |i| isos[i] = .{
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.source = pinfo.overrides[i].source,
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.gsi = pinfo.overrides[i].gsi,
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.flags = pinfo.overrides[i].flags,
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};
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const pm_timer: ?architecture.PmTimer = if (pinfo.pm_timer.present())
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.{ .mmio = pinfo.pm_timer.mmio, .address = pinfo.pm_timer.address, .is_32bit = pinfo.pm_timer_32bit }
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else
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null;
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architecture.configurePlatform(.{
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.pic_present = pinfo.pic_present,
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.hpet_base = hpet_base,
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.pm_timer = pm_timer,
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.ioapic_base = ioapic_base,
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.ioapic_gsi_base = ioapic_gsi,
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.overrides = isos[0..iso_n],
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});
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if (pinfo.spcr_uart) |u| architecture.serialReconfigure(u.mmio, u.address);
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log.write("danos: platform\n");
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log.print(" 8259 PIC : {s}\n", .{if (pinfo.pic_present) "present" else "absent"});
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log.print(" lapic base : 0x{x}\n", .{pinfo.lapic_base});
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log.print(" hpet base : 0x{x}\n", .{hpet_base});
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log.print(" pm timer : {s} 0x{x} ({s})\n", .{ if (pinfo.pm_timer.mmio) "mmio" else "io", pinfo.pm_timer.address, if (pinfo.pm_timer_32bit) "32-bit" else "24-bit" });
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if (pinfo.spcr_uart) |u| {
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log.print(" console UART: {s} 0x{x} (SPCR type {d})\n", .{ if (u.mmio) "mmio" else "io", u.address, pinfo.spcr_kind });
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} else {
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log.write(" console UART: none in SPCR -> legacy COM1\n");
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}
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log.print(" ioapic : base 0x{x}, {d} inputs (masked); route0 raw 0x{x}\n", .{ ioapic_base, architecture.irqRouteCount(), architecture.irqRouteRaw(0) });
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const cores = platform.cpus();
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log.print(" cpus : {d} usable core(s); 1 running (BSP), {d} AP(s) parked (SMP bring-up pending)\n", .{ cores.len, if (cores.len > 0) cores.len - 1 else 0 });
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if (platform.cpusDropped() > 0)
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log.print(" cpus : WARNING {d} core(s) beyond pool cap dropped\n", .{platform.cpusDropped()});
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} else |err| {
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log.print("\ndanos: device discovery failed: {s}\n", .{@errorName(err)});
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}
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log.checkpoint(cp_discovery);
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// Install the system_call handler (int 0x80 gate + system_call stub) once, before any
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// user code runs.
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process.init();
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// Register the current context as the first task before enabling preemption.
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scheduler.init(4);
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log.checkpoint(cp_scheduler);
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log.write("\ndanos: scheduler online\n");
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// Start the timer and unmask interrupts — the kernel now has a heartbeat, and
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// the timer preempts among tasks.
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architecture.startTimer();
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architecture.enableInterrupts();
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log.checkpoint(cp_timer);
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log.print("danos: timer online ({d} Hz tick; timer clock {d} MHz, clock {d} MHz; calibrated via {s})\n", .{ architecture.timer_hz, architecture.timerClockHz() / 1_000_000, architecture.clockHz() / 1_000_000, architecture.timerCalibrationSource() });
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// Wake the other cores (application processors). A no-op on a single-core
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// machine; on SMP each AP climbs to long mode and reports in (docs/smp.md).
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bringUpSecondaries();
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// In a test build (`zig build -Dtest-case=<name>`), run that case and stop.
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// Normal builds fall through to the idle halt.
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if (build_options.test_case) |case| {
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tests.run(case, boot_information);
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architecture.halt();
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}
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log.checkpoint(cp_running);
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status("kernel initialised.\n");
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// Hand over to user space: load /sbin/init (read off the boot volume by the
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// loader) and spawn it as a real ring-3 process, PID 1. It runs on its own
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// address space, preemptively, alongside the kernel — no cooperative
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// borrowing. This boot context then becomes the BSP's idle loop.
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if (boot_information.init_len != 0) {
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status("starting /sbin/init...\n");
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const image = @as([*]const u8, @ptrFromInt(boot_handoff.physicalToVirtual(boot_information.init_base)))[0..boot_information.init_len];
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process.spawnProcess(image, 4) catch |err| {
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statusPrint("/sbin/init failed to load: {s}\n", .{@errorName(err)});
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};
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} else {
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status("no /sbin/init on the boot volume.\n");
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}
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// Spawn the extra user binaries the loader ferried in the initial_ramdisk (the VFS
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// server, and later device drivers). For now the kernel launches them all;
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// once init is a real service supervisor it will spawn them itself (system_spawn).
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startInitialRamdiskBinaries(boot_information);
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// Become the idle task: drop below every real task and halt until an
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// interrupt. The timer keeps preempting into init and any other work.
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scheduler.setPriority(0);
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status("\nkernel idle; /sbin/init is running.\n");
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architecture.halt();
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}
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/// Spawn every program bundled in the initial_ramdisk as its own ring-3 process. A bad
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/// image or a program that fails to load is logged and skipped — the rest of the
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/// system still runs.
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fn startInitialRamdiskBinaries(boot_information: *const boot_handoff.BootInformation) void {
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if (boot_information.initial_ramdisk_len == 0) return;
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const image = @as([*]const u8, @ptrFromInt(boot_handoff.physicalToVirtual(boot_information.initial_ramdisk_base)))[0..boot_information.initial_ramdisk_len];
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const rd = initial_ramdisk.Reader.init(image) orelse {
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status("initial_ramdisk: bad image, skipping\n");
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return;
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};
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var i: u32 = 0;
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while (i < rd.count) : (i += 1) {
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const item = rd.entry(i) orelse continue;
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statusPrint("starting /sbin/{s} (from initial_ramdisk)...\n", .{item.name});
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process.spawnProcess(item.blob, 4) catch |err| {
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statusPrint("initial_ramdisk: {s} failed to load: {s}\n", .{ item.name, @errorName(err) });
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};
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}
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}
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/// Wake the application processors the firmware left parked. Allocates the low
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/// trampoline page (and makes it executable), then wakes each non-boot core in turn,
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/// handing it a fresh kernel stack and its per-CPU slot. Cores that don't report in
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/// are left parked — the running system is unaffected. See docs/smp.md.
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fn bringUpSecondaries() void {
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const cores = platform.cpus();
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if (cores.len <= 1) return;
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// A low (<1 MiB) frame was reserved at boot for the real-mode trampoline (a SIPI
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// vector addresses it). It's kept for the system's life — armed only during a
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// wake, inert (zeroed, non-executable) otherwise — so cores can be re-woken later.
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if (ap_trampoline_page == 0) {
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log.write("danos: smp: no low page for the AP trampoline; staying uniprocessor\n");
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return;
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}
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architecture.setTrampolinePage(ap_trampoline_page);
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architecture.setSecondaryEntry(scheduler.secondaryMain); // where a woken core joins the run loop
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// Test hook: the smp-retry case forces the first wake to fail, so the retry below
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// must still bring every core online. Inert in a normal build (test_case is null).
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if (build_options.test_case) |tc| {
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if (std.mem.eql(u8, tc, "smp-retry")) architecture.testFailNextWakes(1);
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}
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log.print("\ndanos: bringing up {d} application processor(s)\n", .{cores.len - 1});
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const maximum_wake_attempts = 3; // a core that misses the first INIT-SIPI-SIPI gets retried
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for (cores[1..], 1..) |core, index| {
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const stack = heap.allocator().alloc(u8, parameters.kernel_stack_size) catch {
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log.print(" cpu apic_id {d}: no stack; skipped\n", .{core.apic_id});
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continue;
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};
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const stack_top = (@intFromPtr(stack.ptr) + stack.len) & ~@as(usize, 15);
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// This core's dedicated fault stack — allocated only now that the core is
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// real, rather than reserved statically for every possible core.
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const fault_stack = heap.allocator().alloc(u8, architecture.fault_stack_size) catch {
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log.print(" cpu apic_id {d}: no fault stack; skipped\n", .{core.apic_id});
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continue;
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};
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architecture.setFaultStack(index, (@intFromPtr(fault_stack.ptr) + fault_stack.len) & ~@as(usize, 15));
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const pc = scheduler.prepareSecondary(index, core.apic_id);
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var attempt: u32 = 1;
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while (attempt <= maximum_wake_attempts) : (attempt += 1) {
|
|
if (architecture.startSecondary(core.apic_id, stack_top, @intFromPtr(pc), index)) {
|
|
pc.online = true;
|
|
log.print(" cpu apic_id {d}: online (attempt {d})\n", .{ core.apic_id, attempt });
|
|
break;
|
|
}
|
|
if (attempt == maximum_wake_attempts)
|
|
log.print(" cpu apic_id {d}: no response after {d} attempts (parked)\n", .{ core.apic_id, maximum_wake_attempts });
|
|
}
|
|
}
|
|
log.print("danos: {d}/{d} cores online\n", .{ scheduler.onlineCount(), cores.len });
|
|
}
|
|
|
|
/// A user-facing status line: to the diagnostic `log` *and* the on-screen console
|
|
/// (if a framebuffer is present). The verbose log uses `log.*` directly and never
|
|
/// touches the framebuffer.
|
|
fn status(message: []const u8) void {
|
|
log.write(message);
|
|
console.write(message);
|
|
}
|
|
|
|
fn statusPrint(comptime fmt: []const u8, args: anytype) void {
|
|
var buffer: [256]u8 = undefined;
|
|
status(std.fmt.bufPrint(&buffer, fmt, args) catch return);
|
|
}
|
|
|
|
/// Frames (4 KiB pages) to whole MiB.
|
|
fn mib(pages: u64) u64 {
|
|
return pages * abi.page_size / (1024 * 1024);
|
|
}
|
|
|
|
fn kib(frames: u64) u64 {
|
|
return frames * abi.page_size / (1024);
|
|
}
|
|
|
|
/// Report a CPU exception and halt **this core**. There's no fault recovery yet, so
|
|
/// the faulting core is terminal — but the fault is *contained* to it: on an
|
|
/// application processor only that core stops, and the rest of the system keeps
|
|
/// running (full recovery — kill the task, keep the core — is the resilience track,
|
|
/// see docs/resilience.md). The report names the core so an AP fault is attributed,
|
|
/// and goes to every output sink plus a POST code and a persistent breadcrumb.
|
|
fn onException(state: *const architecture.CpuState) noreturn {
|
|
log.checkpoint(cp_exception);
|
|
const core = scheduler.currentCpuIndex();
|
|
// A fault is user-facing enough to paint on screen too (via statusPrint), on
|
|
// top of the diagnostic log.
|
|
statusPrint("\nCPU EXCEPTION on core {d}: {s} (vector {d})\n", .{ core, architecture.exceptionName(state.vector), state.vector });
|
|
statusPrint(" error code : 0x{x}\n", .{state.error_code});
|
|
statusPrint(" IP : 0x{x:0>16}\n", .{architecture.instructionPointer(state)});
|
|
statusPrint(" SP : 0x{x:0>16}\n", .{architecture.stackPointer(state)});
|
|
if (architecture.faultAddress(state)) |address| statusPrint(" fault addr : 0x{x:0>16}\n", .{address});
|
|
|
|
var buffer: [128]u8 = undefined;
|
|
log.recordPanic(std.fmt.bufPrint(&buffer, "CPU exception {s} (vector {d}) on core {d} at IP 0x{x}", .{ architecture.exceptionName(state.vector), state.vector, core, architecture.instructionPointer(state) }) catch "cpu exception");
|
|
architecture.halt();
|
|
}
|
|
|
|
/// Freestanding has no OS to receive a panic. Emit it to every output sink, drop a
|
|
/// POST code + a persistent breadcrumb (so a post-mortem can recover it even with
|
|
/// no live console), then halt. Assumes no console — the sinks self-guard.
|
|
pub const panic = std.debug.FullPanic(struct {
|
|
fn panic(message: []const u8, first_trace_address: ?usize) noreturn {
|
|
_ = first_trace_address;
|
|
log.checkpoint(cp_panic);
|
|
log.recordPanic(message);
|
|
status("\nKERNEL PANIC: ");
|
|
status(message);
|
|
status("\n");
|
|
architecture.halt();
|
|
}
|
|
}.panic);
|