146 lines
6.8 KiB
Zig
146 lines
6.8 KiB
Zig
//! The "device" library domain (library/device): what a driver author imports.
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//! The flat reference data (device-abi, pci-class, acpi-ids, usb-abi, usb-ids),
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//! typed MMIO access, the driver-side client libraries (driver, pci, usb,
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//! block), the AML interpreter, and the data-driven device registry.
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const std = @import("std");
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pub fn build(b: *std.Build) void {
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const kernel = b.dependency("kernel", .{});
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const protocol = b.dependency("protocol", .{});
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const csv = b.dependency("csv", .{});
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const abi = kernel.module("abi");
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const system_call = kernel.module("system-call");
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const ipc = kernel.module("ipc");
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const time = kernel.module("time");
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// A driver finds the bus it attaches to by name — `/protocol/device-manager`,
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// `/protocol/usb-transfer`, `/protocol/block`
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// (docs/os-development/protocol-namespace.md).
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const channel = kernel.module("channel");
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// The devices sub-project's public interface (the flat wire types),
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// importable by user space, unlike the kernel-internal device model it
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// also feeds (system/kernel/device-model.zig).
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const device_abi = b.addModule("device-abi", .{
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.root_source_file = b.path("model/device-abi.zig"),
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});
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// PCI class-code decoding (class/subclass/prog-IF -> names). Pure reference
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// data, shared by kernel discovery and any user-space PCI tool.
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const pci_class = b.addModule("pci-class", .{
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.root_source_file = b.path("pci/pci-class.zig"),
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});
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// ACPI/PnP hardware-ID (_HID) names — the flat analog of pci-class.
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_ = b.addModule("acpi-ids", .{
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.root_source_file = b.path("acpi/acpi-ids.zig"),
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});
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// The AML interpreter, a build module so the ring-3 acpi service can run
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// the same parser the kernel does (docs/discovery.md). Pure Zig, no kernel
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// imports — one source, two builds.
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_ = b.addModule("aml", .{
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.root_source_file = b.path("acpi/aml/aml.zig"),
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});
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// The USB device-framework wire ABI (chapter-9 set-up packets, standard +
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// class requests, descriptors) and the USB class-code taxonomy.
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const usb_abi = b.addModule("usb-abi", .{
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.root_source_file = b.path("usb/usb-abi.zig"),
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});
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const usb_ids = b.addModule("usb-ids", .{
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.root_source_file = b.path("usb/usb-ids.zig"),
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});
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// Typed volatile MMIO register access + memory-ordering barriers, for
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// drivers on top of an mmio_map grant. Depends only on `builtin`.
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const mmio = b.addModule("mmio", .{
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.root_source_file = b.path("mmio/mmio.zig"),
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});
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// The driver author's interface: device access + the device-manager hello
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// handshake, folded together.
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const driver = b.addModule("driver", .{
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.root_source_file = b.path("driver/driver.zig"),
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.imports = &.{
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.{ .name = "abi", .module = abi },
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.{ .name = "channel", .module = channel },
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.{ .name = "device-abi", .module = device_abi },
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.{ .name = "system-call", .module = system_call },
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.{ .name = "ipc", .module = ipc },
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.{ .name = "time", .module = time },
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.{ .name = "device-manager-protocol", .module = protocol.module("device-manager-protocol") },
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},
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});
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// A device driver's view of its claimed PCI function: config-space header
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// fields, BAR decode + map, capability walks (legacy + extended), MSI/MSI-X
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// programming, power state, and function-level reset — the generic PCI
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// mechanics every leaf PCI driver used to re-derive inline.
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_ = b.addModule("pci", .{
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.root_source_file = b.path("pci/pci.zig"),
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.imports = &.{
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.{ .name = "driver", .module = driver },
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.{ .name = "mmio", .module = mmio },
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.{ .name = "pci-class", .module = pci_class },
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.{ .name = "time", .module = time },
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},
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});
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// The USB class-driver transfer client: open a device on the xHCI bus and
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// drive it (control / interrupt / bulk). Re-exports usb-abi / usb-ids as
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// usb.abi / usb.ids for a single USB import.
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_ = b.addModule("usb", .{
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.root_source_file = b.path("usb/usb.zig"),
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.imports = &.{
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.{ .name = "channel", .module = channel },
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.{ .name = "ipc", .module = ipc },
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.{ .name = "time", .module = time },
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.{ .name = "usb-transfer-protocol", .module = protocol.module("usb-transfer-protocol") },
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.{ .name = "usb-abi", .module = usb_abi },
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.{ .name = "usb-ids", .module = usb_ids },
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},
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});
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// The block-device client — a device type, so it lives here.
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_ = b.addModule("block", .{
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.root_source_file = b.path("block/block.zig"),
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.imports = &.{
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.{ .name = "channel", .module = channel },
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.{ .name = "envelope", .module = protocol.module("envelope") },
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.{ .name = "ipc", .module = ipc },
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.{ .name = "time", .module = time },
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.{ .name = "block-protocol", .module = protocol.module("block-protocol") },
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},
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});
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// The device registry: parse /system/configuration/devices.csv into match rules and bind a
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// reported device to a driver. Pure logic (no hardware, no syscalls), so it
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// unit-tests on the host; the device manager imports it.
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_ = b.addModule("device-registry", .{
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.root_source_file = b.path("registry/device-registry.zig"),
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.imports = &.{.{ .name = "csv", .module = csv.module("csv") }},
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});
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// Standalone `zig build test` for this domain alone; the root build keeps
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// its aggregate test step.
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const test_step = b.step("test", "Run the device library unit tests");
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for ([_][]const u8{
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"model/device-abi.zig", // wire-type sizes
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"pci/pci-class.zig", // class/subclass/prog-IF name decoding
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"acpi/acpi-ids.zig", // _HID name decoding
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"acpi/aml/aml.zig", // AML parse + interpret, incl. Notify dispatch
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"usb/usb-abi.zig", // wire sizes + bit packings + set-up packet encodings
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"usb/usb-ids.zig", // class/subclass/protocol code assignments
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"mmio/mmio.zig", // barriers assemble + registers round-trip
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}) |root| {
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const device_tests = b.addTest(.{
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.root_module = b.createModule(.{
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.root_source_file = b.path(root),
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.target = b.resolveTargetQuery(.{}),
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}),
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});
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test_step.dependOn(&b.addRunArtifact(device_tests).step);
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}
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// The registry needs its csv import wired, so it doesn't fit the loop.
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const registry_tests = b.addTest(.{
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.root_module = b.createModule(.{
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.root_source_file = b.path("registry/device-registry.zig"),
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.target = b.resolveTargetQuery(.{}),
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.imports = &.{.{ .name = "csv", .module = csv.module("csv") }},
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}),
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});
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test_step.dependOn(&b.addRunArtifact(registry_tests).step);
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}
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