121 lines
6.6 KiB
Markdown
121 lines
6.6 KiB
Markdown
# ARM targets (`arm` and `aarch64`)
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danos aims to run on Raspberry Pi hardware eventually. "ARM" isn't one target,
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though — the Pis span **two different CPU architectures** (32-bit `arm` and 64-bit
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`aarch64`) and (stock) a different boot protocol from x86-64's UEFI. **danos targets
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`aarch64` only** (see the decision below); the `arm`/`aarch64` distinction still
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matters for understanding why. This page maps the landscape so the
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[arch split](arch.md) and build system can be planned for it.
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## `arm` vs `aarch64` — 32-bit vs 64-bit
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- **`arm`** = **32-bit** ARM (the *AArch32* state, A32/T32 instruction sets).
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ARMv7 and earlier, plus the 32-bit compatibility mode of newer cores. 16 × 32-bit
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registers.
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- **`aarch64`** = **64-bit** ARM (the *AArch64* state, A64 instruction set), from
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**ARMv8-A** on. Also called **arm64**. 31 × 64-bit registers, a fixed 32-bit
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instruction width, a redesigned exception model — *not* a widening of A32, a clean
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new ISA.
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They are as different from each other as either is from x86-64: separate registers,
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page-table formats, and calling conventions. Each needs its own `system/kernel/arch/<name>/`.
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## The Raspberry Pi models
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| Model | SoC | Core | Architecture | danos target |
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|-------|-----|------|--------------|--------------|
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| Pi Zero / Zero W | BCM2835 | ARM1176JZF-S | ARMv6, 32-bit only | `arm` (not planned) |
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| **Pi Zero 2 W** ← target | BCM2710 | Cortex-A53 | ARMv8-A, 64-bit | **`aarch64`** |
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| **Pi 3 / 3B+** | BCM2837 | Cortex-A53 | ARMv8-A, 64-bit | **`aarch64`** |
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| **Pi 4** | BCM2711 | Cortex-A72 | ARMv8-A, 64-bit | **`aarch64`** |
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| **Pi 5** | BCM2712 | Cortex-A76 | ARMv8.2-A, 64-bit | **`aarch64`** |
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> **Decision: `aarch64` only.** The target small board is a **Pi Zero 2 W** (BCM2710,
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> Cortex-A53) — which is **`aarch64`**, *not* the original Zero W's 32-bit ARMv6. So
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> every ARM board danos targets (Zero 2 W and Pi 3-5) is `aarch64`, and the 32-bit
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> `arm`/ARMv6 backend is **not planned** — one ARM CPU port, not two. The original
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> Zero W (ARMv6) would only re-enter scope if that specific older board were ever
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> needed; the row above is kept only to explain the distinction.
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## Booting: UEFI is not x86-only
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The boot protocol is a **separate axis** from the CPU (see [arch.md](arch.md)):
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- **UEFI** exists for ARM too — ARM servers require it (SBSA/SBBR), QEMU boots it
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with **AAVMF** (the AArch64 build of the same EDK2 firmware as x86's OVMF), and
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the Pi can even run it with community UEFI firmware. Under UEFI the handoff is the
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*same* as x86-64: system table, boot services, memory map, GOP framebuffer — so
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the loader logic largely carries over.
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- **Device tree / firmware boot** — the **stock** Raspberry Pi firmware (VideoCore
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bootloader) is *not* UEFI: it loads the kernel and jumps to it with a **device-tree
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blob (DTB)** pointer. Both the Zero W and stock Pi 3-5 boot this way.
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Note that even under UEFI on ARM, the OS still gets its hardware description from
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**ACPI or a device tree** (often the DTB passed via a UEFI configuration table). So
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"UEFI on ARM" doesn't remove the device tree — UEFI gives you memory + framebuffer;
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the DTB/ACPI tells you what devices exist.
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## What danos needs, layer by layer
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- **One CPU arch module: `system/kernel/arch/aarch64/`** — covering the Zero 2 W and Pi 3-5,
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providing the same `arch` interface as x86_64: `halt`, context switch,
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interrupt/exception vectors, page tables, a UART, a timer. No `system/kernel/arch/arm/` is
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planned (see the decision above), so there's a single ARM backend to write.
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- **A device-tree boot path.** Since stock Pis boot via DTB, danos needs an entry
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that parses the DTB's `/memory` and `/reserved-memory` into the neutral
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[`MemoryMap`](memory-map.md) — the same neutral handoff `efi.zig` produces, just
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from a different source. This is where keeping boot-protocol knowledge on the
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loader side (as we did for the UEFI memory-map classification) pays off.
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- **The UEFI loader mostly carries over.** `boot/efi.zig` is largely
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boot-*protocol* code (`std.os.uefi` protocol calls), not x86 code. Its only truly
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x86-specific bits are the ELF machine check (`.X86_64`) and the SysV calling
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convention for the kernel jump. So an `aarch64`-UEFI target (QEMU `virt` + AAVMF)
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can reuse it — which makes **aarch64-UEFI the easiest second target**, easier than
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the device-tree Pi.
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## Pi hardware quirks (for when we port)
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The Pi is not a "standard" ARM platform — expect Broadcom-specific peripherals:
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- **Peripheral base moves per SoC**: `0x2000_0000` (BCM2835, Zero W),
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`0x3F00_0000` (BCM2837, Pi 3), `0xFE00_0000` (BCM2711, Pi 4), different again on
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Pi 5. Everything below is an offset from it.
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- **UART**: a **PL011** (at base + `0x20_1000`) plus a mini-UART; on some boards the
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PL011 is wired to Bluetooth, so which one is the console varies. This is the
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`aarch64`/`arm` equivalent of our x86 [COM1 serial](testing.md).
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- **Interrupt controller**: *not* a standard ARM GIC on the older parts — the Zero W
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and Pi 3 use Broadcom's own ARMCTRL controller (Pi 3 adds a per-core "local"
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controller for timers/mailboxes). The **Pi 4 and 5 do have a GIC-400**. So the
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interrupt backend differs even within the `aarch64` Pis.
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- **Timer**: the ARM generic timer (`CNTPCT`/`CNTFRQ`) on ARMv8, or the BCM system
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timer — the counterpart to our calibrated LAPIC/TSC clock.
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## Building each (intended)
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`build.zig` currently pins the kernel to `x86_64`; supporting these means selecting
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the target and `arch` module together (e.g. a `-Darch=` option). The Zig target
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queries would be roughly:
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- **Pi Zero W**: `.cpu_arch = .arm`, `.cpu_model = arm1176jzf_s`, `.os_tag = .freestanding`
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- **Pi 3**: `.cpu_arch = .aarch64`, `.cpu_model = cortex_a53`, `.os_tag = .freestanding`
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- **Pi 4**: `.cpu_arch = .aarch64`, `.cpu_model = cortex_a72`
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- **Pi 5**: `.cpu_arch = .aarch64`, `.cpu_model = cortex_a76`
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## Testing in QEMU
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Two routes, mirroring how we test x86-64 with OVMF:
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- **Board emulation**: `qemu-system-aarch64 -machine raspi3b` (and `raspi4b` on
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recent QEMU) for the Pi 3/4; `qemu-system-arm -machine raspi0`/`raspi1ap` for the
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ARMv6 Zero-class board — closest to real hardware, device-tree boot.
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- **Generic aarch64-UEFI**: `qemu-system-aarch64 -machine virt` + AAVMF — the
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cleanest way to bring up the `aarch64` kernel via the reused UEFI loader before
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tackling Pi-specific boards. A future `run-aarch64` build step would use this.
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## Related
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- [arch.md](arch.md) — the arch-module boundary these targets plug into, and the
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CPU-arch vs boot-protocol "two axes".
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- [efi.md](efi.md) — the UEFI loader that carries over to aarch64-UEFI.
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- [vision.md](vision.md) — why isolated, portable-across-architectures is the goal.
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