106 lines
5.1 KiB
Markdown
106 lines
5.1 KiB
Markdown
# Architecture split
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danos targets x86_64 today, but is meant to grow onto other systems later — a
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Raspberry Pi, say, which is AArch64 and has no UEFI. To keep that possible without
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a rewrite, CPU-specific kernel code lives behind a boundary: the generic kernel
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never names an architecture, and each architecture plugs in behind it.
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## The seam is a build-time module named `arch`
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The mechanism is deliberately boring — no vtables, no function-pointer tables, no
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runtime dispatch. `build.zig` exposes one architecture's code as a module called
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`arch`:
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```zig
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const arch_mod = b.addModule("arch", .{
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.root_source_file = b.path("src/kernel/arch/x86_64/cpu.zig"),
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});
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```
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and the generic kernel imports it by that name:
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```zig
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const arch = @import("arch");
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// ...
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arch.halt(); // never says "x86_64"
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```
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Adding a second architecture is then a build-time choice: create
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`src/kernel/arch/aarch64/`, and point the `arch` module at it when the target CPU is
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AArch64. `main.zig` and `console.zig` don't change. **That compiler-checked module
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boundary _is_ the architecture interface** — when a new arch is missing a function
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the generic kernel calls, the build fails and names exactly what's missing.
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## What's arch-specific vs generic
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The split follows a simple test: does it name a CPU instruction, a hardware
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register, or a memory-management structure? If so, it's arch-specific.
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| Arch-specific — `src/kernel/arch/x86_64/` | Generic — kernel core |
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|---|---|
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| `cpu.zig`: `halt()` (`hlt`), later GDT/IDT/paging | `console.zig` — pure pixel math, works anywhere |
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| `linker.ld` — link layout, load address | `main.zig` — `kmain` orchestration, panic handler |
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| (future) interrupt controller, MMU setup | `root.zig` — the neutral handoff contract |
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Notice the framebuffer console is *generic*: it just writes pixels into whatever
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framebuffer it's handed, so it needs no per-arch version. Most of the kernel
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should end up on the generic side; the arch module stays small.
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## Two axes, kept separate
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There are really two independent questions, and it's worth not conflating them:
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- **CPU architecture** (x86_64 vs AArch64): instructions, MMU, interrupts →
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`src/kernel/arch/<cpu>/`.
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- **Boot protocol** (UEFI vs Raspberry Pi firmware + device tree): handled
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*separately*, because loaders are their own binaries. `src/boot/efi.zig` builds
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`BOOTX64.efi`, a distinct executable from the kernel ELF. On a Pi there is no
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separate loader at all — the firmware jumps straight into the kernel with a
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device-tree pointer, so that entry work would live in the AArch64 arch code.
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Either path converges on the same neutral [`BootInfo`](memory-map.md).
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## Current x86_64 contents
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- **`src/kernel/arch/x86_64/cpu.zig`** — the `arch` module root. Exposes `halt()` (see
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[halting.md](halting.md)), `init()` (bring up the descriptor tables),
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`enablePaging()`, `setFaultHandler`, `readCr2`/`readCr3`, and the `CpuState`
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trap frame.
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- **`src/kernel/arch/x86_64/gdt.zig`** / **`idt.zig`** / **`tss.zig`** — the GDT, IDT and
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TSS plus CPU-exception handling (see [interrupts.md](interrupts.md)).
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- **`src/kernel/arch/x86_64/paging.zig`** — the kernel's page tables (see
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[paging.md](paging.md)).
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- **`src/kernel/arch/x86_64/apic.zig`** — the Local APIC and its timer, the source of
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device interrupts (see [device-interrupts.md](device-interrupts.md)).
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- **`src/kernel/arch/x86_64/serial.zig`** / **`io.zig`** — the COM1 UART (the kernel's
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machine-readable log channel, see [testing.md](testing.md)) and the shared
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port-I/O + MSR primitives.
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- **`src/kernel/arch/x86_64/isr.s`** — the exception stubs, the `lgdt`/`lidt`/`ltr` load
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helpers, and the context switch (`switch_context` / `task_trampoline`, see
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[scheduling.md](scheduling.md)) — real assembly, since Zig inline asm can't
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express them.
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- **`src/kernel/arch/x86_64/linker.ld`** — the kernel link layout (fixed low load
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address, one PT_LOAD per permission set).
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The kernel entry point `_start` currently still lives in the generic `main.zig` as
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a thin trampoline into `kmain`. It's arch-adjacent (its calling convention is
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x86_64 [SysV](sysv.md), via the shared `danos.kernel_abi`), but it's three lines
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and mostly generic, so it stays put for now. When AArch64 arrives — where entry means setting
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up a stack and reading a device-tree pointer from a register — the entry work will
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be substantial and per-arch, and *that* is when we extract an entry interface into
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the arch modules.
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## The discipline
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The thing that makes this help rather than hurt: **only extract what's provably
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architecture-specific, and let the interface emerge with the second
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implementation.** With a single architecture you're guessing at the seam, and a
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wrong guess encoded as elaborate abstraction is expensive to undo. So:
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- Move code into `arch/` only when it genuinely names CPU-specific machinery.
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- Grow the `arch` surface one function at a time, as steps need it.
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- Don't pre-design the interrupt or paging interfaces before writing them.
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Directory hygiene is cheap and reversible; premature abstraction is neither. When
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arch #2 lands and something doesn't fit, reshaping a few hundred lines is nothing —
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unwinding an abstraction empire is not.
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