The one giant `runtime` module (with a `system.zig` that was itself a dumping ground of unrelated syscalls) is split into directly-importable, flat concern modules under library/kernel/: system-call ipc memory process thread time logging file-system service start (+ the device/service clients: device, device-manager, block, display, input) system.zig is dissolved — its functions moved to their concern home (mmap -> memory, spawn/kill/exit -> process, sleep/clock -> time, write/klog -> logging, fs* -> file-system). `memory` merges heap+dma+shared-memory behind one flat API (memory.allocator/dmaAlloc/sharedCreate/mmap), keeping heap's state and malloc export single. The memory<->thread dependency cycle (heap needs Thread.Mutex, thread needs mmap) is broken by having thread allocate its own stack via the raw mmap syscall, so the module graph is a DAG. This is the atomic step: all 42 internal cross-imports flip from relative to module imports at once. `runtime.zig` and `system.zig` become thin re-export SHIMS so the ~38 consumers keep compiling on `runtime.*` untouched; they migrate to direct imports in C2, after which the shims are deleted (C5). zig build + zig build test green; 14 QEMU cases pass (smoke, process, process-kill, thread-spawn/join, logger, vfs, fat-mount, display-native, usb-storage, virtio-gpu, device-manager, input, power-button).
49 lines
2.0 KiB
Zig
49 lines
2.0 KiB
Zig
//! User-space DMA memory: `dma_alloc` / `dma_free`. A driver that programs a
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//! bus-mastering engine needs a descriptor ring the device can read — memory that is
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//! physically contiguous, at a physical address the driver knows, uncacheable, and
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//! pinned. `mmap` gives none of those; this does. Pair it with the barriers in
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//! `/lib/mmio` (fill the ring, `wmb()`, ring the doorbell). See docs/driver-model.md.
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const abi = @import("abi");
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const sc = @import("system-call");
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/// Allocation flags. `coherent` (uncacheable) is the portable default; the rest are
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/// opt-in for specific hardware — see `abi`.
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pub const coherent: usize = abi.dma_coherent;
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pub const write_combining: usize = abi.dma_write_combining;
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pub const below_4g: usize = abi.dma_below_4g;
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/// A DMA allocation: the `virtual` address the CPU touches, and the `physical` address
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/// to program into the device's descriptor-ring / base registers.
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pub const Region = struct {
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virtual: usize,
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physical: usize,
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};
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inline fn failed(r: usize) bool {
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return r > ~@as(usize, 0) - 4095;
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}
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/// Allocate `len` bytes of DMA-capable memory with `flags` (e.g. `coherent`, or
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/// `coherent | below_4g`). Returns the virtual/physical pair, or null on failure. Two
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/// return values — the virtual address in rax, the physical address in rdx — so it
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/// needs a hand-written stub.
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pub fn alloc(len: usize, flags: usize) ?Region {
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var rax: usize = undefined;
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var rdx: usize = undefined; // out: physical address
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asm volatile ("syscall"
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: [rax] "={rax}" (rax),
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[rdx] "={rdx}" (rdx),
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: [n] "{rax}" (@intFromEnum(abi.SystemCall.dma_alloc)),
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[a0] "{rdi}" (len),
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[a1] "{rsi}" (flags),
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: .{ .rcx = true, .r11 = true, .memory = true });
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if (failed(rax)) return null;
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return .{ .virtual = rax, .physical = rdx };
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}
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/// Release a region from a prior `alloc` (`virtual` and the same `len`).
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pub fn free(virtual: usize, len: usize) void {
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_ = sc.systemCall2(.dma_free, virtual, len);
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}
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