Daniel Samson
4ef21fa083
Two parts, both blockers for real PCI drivers. ECAM config space per function: enumeratePci now gives every pci_device its own 4 KiB configuration window as resource 0. A claimed PCI driver mmio_maps that to reach its command register, BARs, and — the point — its capability list (MSI/MSI-X, PCIe extended caps), with no new syscall. Verified in the discovery test (QEMU q35's functions each carry it). MSI: msi_bind(device_id, endpoint) -> address (rax), data (rdx) allocates a per-device edge-triggered vector, binds it to the endpoint, and returns the (address, data) the driver programs into its own MSI capability. Unlike irq_bind there's no GSI, no I/O APIC entry, no sharing, and no ack cycle — dispatch recognises an MSI vector (vector_gsi == none, msi_bound set), EOIs, and notifies. Owner-keyed release drops the binding on exit. Legacy INTx (_PRT parsing + shared lines) is deliberately skipped; MSI is the real answer. QEMU's HPET has no MSI, so the new `msi` test proves the vector-routing path with a self-IPI (new apic.selfIpi) standing in for the device's MSI write: bind a vector, fire it, the bound endpoint is notified. The msi_bind syscall wraps irq.msiBind with the claim check and lands its first real use with the first PCI driver. Suite 39/39 plus host tests.
93 lines
4.5 KiB
Zig
93 lines
4.5 KiB
Zig
//! User-space device access: enumerate the kernel's device table, claim a device,
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//! map its MMIO, and bind its interrupt. A driver uses these to find and take
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//! ownership of its hardware; the claim is the capability the kernel checks before
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//! mapping registers or routing an IRQ.
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const abi = @import("abi");
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const device_abi = @import("device-abi");
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const sc = @import("system-call.zig");
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pub const DeviceDescriptor = device_abi.DeviceDescriptor;
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pub const ResourceDescriptor = device_abi.ResourceDescriptor;
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pub const DeviceClass = device_abi.DeviceClass;
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pub const ResourceKind = device_abi.ResourceKind;
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inline fn failed(r: usize) bool {
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return r > ~@as(usize, 0) - 4095;
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}
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/// Copy up to `buffer.len` device descriptors into `buffer`; returns the total count.
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pub fn enumerate(buffer: []DeviceDescriptor) usize {
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return sc.systemCall2(.device_enumerate, @intFromPtr(buffer.ptr), buffer.len);
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}
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/// Take exclusive ownership of device `id`. Returns false if taken or invalid.
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pub fn claim(id: u64) bool {
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return !failed(sc.systemCall1(.device_claim, id));
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}
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/// Map resource `resource_index` (which must be an MMIO window) of claimed device
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/// `device_id` into this address space; returns the register base virtual address.
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pub fn mmioMap(device_id: u64, resource_index: u64) ?usize {
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const r = sc.systemCall2(.mmio_map, device_id, resource_index);
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return if (failed(r)) null else r;
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}
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/// `DeviceDescriptor.parent` for a device with no parent.
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pub const no_parent = device_abi.no_parent;
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/// Publish `descriptor` as a child of `parent_id`, which this process must have claimed.
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/// Returns the new device id. The child is left unclaimed, so whichever driver owns
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/// that class of device can `claim` it — that is how a bus hands off a device.
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///
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/// Every resource in `descriptor` must be **contained** in a parent resource of the same
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/// kind: a sub-window of the parent's MMIO, or one of its IRQs. The kernel refuses
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/// anything else, because a device descriptor is a licence to map physical memory and
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/// a bus driver may only subdivide what it already owns. `descriptor.id` and `descriptor.parent`
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/// are ignored. A device with no resources at all is fine — a USB device is reached
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/// through its controller, not by MMIO.
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pub fn register(parent_id: u64, descriptor: *const DeviceDescriptor) ?u64 {
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const r = sc.systemCall2(.device_register, parent_id, @intFromPtr(descriptor));
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return if (failed(r)) null else r;
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}
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/// Bind resource `resource_index` (which must be an IRQ) of claimed device `device_id` to
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/// `endpoint`. From then on the interrupt arrives as an asynchronous notification:
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/// `ipc.replyWait` on that endpoint returns with the high bit set in `badge` and the
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/// low bits carrying the GSI. The kernel masks the line before waking you.
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pub fn irqBind(device_id: u64, resource_index: u64, endpoint: usize) bool {
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return !failed(sc.systemCall3(.irq_bind, device_id, resource_index, endpoint));
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}
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/// Re-arm a bound IRQ. Call this **after** quieting the device (clearing whatever
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/// status register holds its line asserted) — the kernel left the line masked
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/// precisely because it could not do that for you. Skip it and the interrupt never
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/// fires again; call it before the device is quiet and a level-triggered line storms.
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pub fn irqAck(device_id: u64, resource_index: u64) bool {
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return !failed(sc.systemCall2(.irq_ack, device_id, resource_index));
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}
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/// The Message-Signalled Interrupt address/data a driver programs into its device's
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/// MSI capability. The device raises the interrupt by writing `data` to `address`.
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pub const Msi = struct { address: u64, data: u32 };
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/// Set up MSI for a claimed device: the kernel allocates a per-device edge-triggered
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/// vector, binds it to `endpoint` (delivered like `irqBind`, but with no mask and no
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/// `irqAck` cycle), and returns the (address, data) to write into the device's MSI
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/// capability — found by mmio_mapping the device's ECAM config space (resource 0) and
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/// walking its capability list. Returns null on failure. Two return values (address in
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/// rax, data in rdx), so a hand-written stub.
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pub fn msiBind(device_id: u64, endpoint: usize) ?Msi {
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var rax: usize = undefined;
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var rdx: usize = undefined;
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asm volatile ("syscall"
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: [rax] "={rax}" (rax),
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[rdx] "={rdx}" (rdx),
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: [n] "{rax}" (@intFromEnum(abi.SystemCall.msi_bind)),
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[a0] "{rdi}" (device_id),
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[a1] "{rsi}" (endpoint),
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: .{ .rcx = true, .r11 = true, .memory = true });
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if (failed(rax)) return null;
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return .{ .address = rax, .data = @intCast(rdx) };
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}
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